Nvidia is building CUDA support for RISC-V — but the requirements are steep

CUDA remains the key software platform for GPU computing, machine learning included. Until now it has supported x86-64 and aarch64 processors, and now Nvidia intends to add RISC-V to that list. This would let processors on the open architecture “feed” data to Nvidia graphics cards. At Hot Chips 2026 the company spelled out its requirements for such CPUs — and they are, to put it mildly, not small.

What Nvidia demands

The baseline bar is an RVA23-class processor that complies with the RISC-V specifications for server SoCs and server platforms. These documents already include RAS features (reliability, availability, serviceability), a separate security processor, and other server-grade plumbing.

But that isn't enough for Nvidia. The company doesn't want to be stuck at the “lowest common denominator,” where it can't count on acceleration extensions and has to ship code that is knowingly inefficient. It cites vector extensions as an example: predication makes it possible to do without branching.

A separate headache is ACPI, the mechanism through which software learns about hardware capabilities and manages power, performance, and temperature. When Nvidia's team began porting CUDA, it simply didn't exist in RISC-V. That has been fixed: in 2025 the UEFI Forum added ACPI support for RISC-V, and the Boot and Runtime Services (BRS) specification, which includes ACPI, was ratified.

Nvidia further insists on PCIe coherency. Without it there's a risk of data getting out of sync between the CPU caches and memory: the DMA engine could read stale data from DRAM, or vice versa. Working around this with manual cache invalidation in the CUDA stack is difficult, so the company wants guarantees, not recommendations. Support for direct device-to-device transfers over PCIe (peer-to-peer) is also needed — otherwise buffers have to be shuttled through CPU memory.

The whole list, according to Nvidia, fits on two pages — though the original author wryly notes that it's unclear whether that means two pages in a large font or a cheat sheet onto which a student has creatively crammed as much as possible.

NVLink Fusion and the real prospects

Along the way, Nvidia brought up NVLink Fusion — a program that lets third-party companies use its NVLink IP blocks and connect their own processors (including RISC-V ones) to Nvidia GPUs, as has already been done with Mediatek's CPU in the GB10 chip. The Fusion requirements include all the CUDA conditions plus support for DOCA and NCCL and close partnership with Nvidia itself.

In practice, almost no existing RISC-V hardware meets these requirements, and consumer boards even less so. The first compatible systems will be server-grade: Nvidia is working with SiFive, which promised to show off a high-core-count server running under CUDA at Hot Chips. The Chips and Cheese author expresses hope that Nvidia will loosen the requirements over time — many of them, such as forgoing PCIe coherency or vector extensions, lead only to a loss of performance rather than to something not working at all, and for compute-heavy workloads such a trade-off could be acceptable.

Source: Lobsters