#risc-v
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Linux 7.4 makes a RISC-V memory copy optimization portable
The RISC-V architecture changes have been merged into Linux 7.4. The main one moves the decision to skip software alignment during memory copies to run time, so distribution kernel builds can now use the optimization.
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A computer in the weights: a working RISC-V CPU compiled into Qwen 3.5
Developer Divyansh Agrawal has compiled a 32-bit RISC-V processor directly into the weights of Qwen 3.5 4B. The model's own Gated DeltaNet layers serve as RAM, and no external tools are involved.
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AI agents help formally verify the xv6 kernel down to the hardware level
MIT researchers built MachCSL, a framework that reasons about RISC-V execution at the sub-instruction level, and used LLM agents to prove the xv6 teaching kernel correct — finding 11 bugs along the way.
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Armbian 26.8: rewritten installer and bootable UEFI images
The distribution for ARM and RISC-V single-board computers gets a new installer, a live ISO with UEFI support, and Linux 7.1 as the default kernel.
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LLVM/Clang 23.1: AMD Zen 6 support, NVIDIA Rigel cores and partial C++26
The first stable release of the LLVM 23 series is out — an update to the compiler stack for the second half of 2026. Among the new features are support for AMD Zen 6 processors, the NVIDIA Rigel core, and the first pieces of the C++26 standard.
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Nvidia is building CUDA support for RISC-V — but the requirements are steep
At Hot Chips 2026, Nvidia laid out what a RISC-V processor needs to look like in order to work with CUDA. The list of conditions rules out almost all existing hardware.
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QEMU 11.1: UFS Write Booster Emulation, New RISC-V and Arm Extensions
The popular emulator and virtualization system QEMU 11.1 has been released. There are no major new features in this version, but the set of improvements touches several subsystems at once.
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NetBSD 11.0 Released: RISC-V Support and Improved Linux Compatibility
The nineteenth major release of the BSD system adds support for the 64-bit RISC-V architecture, Qualcomm Snapdragon X1 Elite laptop chips, and expanded compatibility with Linux system calls.
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GNU Binutils 2.47: New RISC-V Extensions and Linker Options
GNU Binutils 2.47 has been released — the core set of binary utilities for systems built with the GNU toolchain. The update brings support for the latest RISC-V extensions, new assembler and linker options, and a faster linking mode.
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Qualcomm Makes a Play for Tenstorrent: A Bet on Open Silicon
Qualcomm is in talks to buy Tenstorrent — Jim Keller's company, building AI accelerators on the open RISC-V architecture — for $8–10 billion. In a single year the startup's price has tripled.